siliconcompiler
A compiler framework that automates translation from source code to silicon.
Decision gist · record as of 2026-08-14
Yes. SiliconCompiler is actively maintained, has no known vulnerabilities, and offers low install friction (pure Python wheel). It is a mature, production-grade tool used for commercial tapeouts. Install it if you need to automate hardware design flows, integrate RTL-to-GDS into CI/CD, or explore ASIC/FPGA design without managing many EDA tools separately. The Apache-2.0 license poses no restrictions.AI-flagged interpretation of the facts on this page — verify before relying
Before you install
- Requires Python 3.10 or later.
- Full ASIC/FPGA flows require external EDA tools (Yosys, OpenROAD, etc.); linting and remote execution work without local tools installed.
- Low friction: pure Python wheel with no compiled dependencies.
License · maintenance · safety
Apache-2.0 (permissive) — Apache-2.0 (permissive): you can use, modify, and distribute SiliconCompiler freely in commercial and open-source projects, with minimal restrictions beyond attribution and liability disclaimers.
last release 2026-08-13 (1 days) · last repo commit 2026-08-14 · 1,199 stars
0 known vulnerabilities (OSV.dev, 2026-08-14) · 148,390 downloads/mo, #11,037 on PyPI
Alternatives
Verify before relying
pip install siliconcompiler
from siliconcompiler import ASIC, Design
from siliconcompiler.targets import skywater130_demo
design = Design("heartbeat")
design.set_topmodule("heartbeat", fileset="rtl")
design.add_file("heartbeat.v", fileset="rtl")
project = ASIC(design)
skywater130_demo(project)
project.run()- Whether remote execution is available by default or requires additional setup/credentials.
- Specific performance characteristics or scalability limits for large designs.
- Whether foundry PDK packaging (gf12lp, gf22fdx, intel16) requires proprietary agreements beyond what the package provides.
What it is and what it does
SiliconCompiler is a Python-based hardware build system that orchestrates the entire design flow from RTL (Verilog, SystemVerilog, VHDL, Chisel, MLIR) to fabrication-ready GDS. It abstracts over many industry EDA tools—synthesis (Yosys, Vivado, Synopsys), place-and-route (OpenROAD, VPR, nextpnr), simulation (Verilator, Icarus, GHDL), and DRC/LVS—through a unified Python API and dynamic JSON schema. The system supports ASIC design, FPGA builds, simulation, and linting, with built-in support for open PDKs (sky130, ihp130, gf180, asap7) via lambdapdk.
The package is designed to "make the complex possible while keeping the simple simple": a basic ASIC flow takes 13 lines of Python, yet the tool scales to commercial tapeouts at advanced nodes. It includes a remote execution model to avoid local tool installation, automatic compilation manifests for provenance, and a modular tool abstraction layer for adding new EDA tools. With 22 runtime dependencies (aiohttp, docker, pandas, Jinja2, PyYAML, etc.), it handles networking, containerization, templating, and data processing internally.
Use it for
- Lint RTL designs without installing any EDA tools—the default linter ships as pure Python.
- Automate ASIC design flows from RTL to DRC-clean GDS using open PDKs (sky130, gf180) or foundry PDKs.
- Build FPGA bitstreams with Yosys, VPR, or nextpnr through a single Python interface.
- Run formal verification and simulation (Verilator, GHDL, SymbiYosys) as part of a unified design flow.
- Execute hardware builds remotely or in Docker to avoid local tool installation and enable cloud-scale compilation.
- Integrate hardware design into CI/CD pipelines using the programmatic Python API and automatic manifests.
Worth the install?
AI-flagged interpretation of the facts on this page. Verify before relying on it.
Yes.
SiliconCompiler is actively maintained, has no known vulnerabilities, and offers low install friction (pure Python wheel). It is a mature, production-grade tool used for commercial tapeouts. Install it if you need to automate hardware design flows, integrate RTL-to-GDS into CI/CD, or explore ASIC/FPGA design without managing many EDA tools separately. The Apache-2.0 license poses no restrictions.
Install
siliconcompiler on PyPI
Before you install
Low friction: pure Python wheel with no compiled dependencies. Active maintenance (last commit 2026-08-14, 1199 GitHub stars). Requires Python 3.10–3.14. Most EDA tools are optional; linting works out-of-the-box. Remote execution available to avoid local tool installation.
Requires Python 3.10 or later. Full ASIC/FPGA flows require external EDA tools (Yosys, OpenROAD, etc.); linting and remote execution work without local tools installed.
License in practice
Apache-2.0 (permissive): you can use, modify, and distribute SiliconCompiler freely in commercial and open-source projects, with minimal restrictions beyond attribution and liability disclaimers.
Quickstart
pip install siliconcompiler
from siliconcompiler import ASIC, Design
from siliconcompiler.targets import skywater130_demo
design = Design("heartbeat")
design.set_topmodule("heartbeat", fileset="rtl")
design.add_file("heartbeat.v", fileset="rtl")
project = ASIC(design)
skywater130_demo(project)
project.run()Verify before relying
- Whether remote execution is available by default or requires additional setup/credentials.
- Specific performance characteristics or scalability limits for large designs.
- Whether foundry PDK packaging (gf12lp, gf22fdx, intel16) requires proprietary agreements beyond what the package provides.
Package facts
| License | Apache-2.0 permissive |
| Python support | Supports the current Python release >=3.10 |
| Install friction | Low. Pure-Python wheel |
| Runtime dependencies | 22 packagesaiohttpdistrodockerfastjsonschemagraphvizorjsonpackagingrequestsPillowPyYAMLGitPythonPyGithuburllib3lambdapdkfastenerstomlibackports.zstdpandaspsutilJinja2pyslangrich |
| Maintenance | Actively maintained 1 days since the last release |
| Last repo commit | |
| First released | |
| Downloads | 148,390 / month, #11,037 on PyPI 30-day window, as of 2026-08-14 |
| Known vulnerabilities | None known OSV.dev, checked 2026-08-14 |
| Classifiers | Environment :: ConsoleOperating System :: MacOSOperating System :: Microsoft :: WindowsOperating System :: POSIX :: LinuxProgramming Language :: Python :: 3.10Programming Language :: Python :: 3.11Programming Language :: Python :: 3.12Programming Language :: Python :: 3.13Programming Language :: Python :: 3.14Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)Topic :: Software Development :: Build Tools |
Evidence: siliconcompiler-0.38.4-py3-none-any.whl
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See also dvsim · edalize · lambdalib · lambdapdk · fusesoc · amaranth · peakrdl-regblock · gdsfactoryplus · systemrdl-compiler · gdsfactory