cocotb
cocotb is a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python.
Decision gist · record as of 2026-08-14
Yes, if you are developing or verifying VHDL or Verilog designs and want to write testbenches in Python. The framework is actively maintained, supports current Python versions, has no known vulnerabilities, and carries a permissive license. Install friction is moderate due to compiled wheels, but the broad platform support (macOS, Linux, Windows; x86_64, ARM, i686) mitigates this. Verify that your target HDL simulator is compatible before committing.AI-flagged interpretation of the facts on this page — verify before relying
Before you install
- Requires a compatible HDL simulator (e.g., Icarus Verilog, GHDL, or commercial simulators) and appropriate environment setup to run testbenches against actual designs.
- Medium install friction due to compiled wheel distribution across multiple Python versions and architectures.
- The project is actively maintained with recent commits and a stable release cadence, suggesting reliable ongoing support.
License · maintenance · safety
BSD-3-Clause (permissive) — BSD-3-Clause is a permissive license allowing commercial use, modification, and distribution with minimal restrictions—suitable for most projects.
last release 2025-11-15 (272 days) · last repo commit 2026-08-14 · 2,470 stars
0 known vulnerabilities (OSV.dev, 2026-08-14) · 589,198 downloads/mo, #5,863 on PyPI
Alternatives
Verify before relying
pip install cocotb
import cocotb
from cocotb.triggers import Timer
@cocotb.test()
async def simple_test(dut):
await Timer(1, units='ns')- Which specific HDL simulators are officially supported or tested with version 2.0.1
- Whether the single runtime dependency find_libpython is sufficient or if system libraries are also required
- Performance characteristics or scalability limits for large testbenches
What it is and what it does
cocotb is a Python-based testbench framework that lets hardware engineers write verification code in Python instead of VHDL or Verilog. It uses coroutines to drive and monitor HDL simulations, bridging the gap between Python's ease of use and the low-level requirements of hardware verification. The framework handles the communication between your Python test code and a running HDL simulator, allowing you to read and write signals, check assertions, and orchestrate complex test scenarios.
The package is designed for digital design verification workflows where you need to test RTL (register-transfer level) designs. It depends on find_libpython to locate the Python runtime, and requires an external HDL simulator to actually run the tests. The project is actively maintained, supports Python 3.6 through 3.13, and has been in development since 2018, with a mature ecosystem of extensions and community resources.
Use it for
- Verify VHDL or Verilog RTL designs by writing test scenarios in Python instead of hardware description languages
- Automate regression testing for digital designs by integrating testbenches into CI/CD pipelines
- Rapidly prototype hardware verification by leveraging Python's standard libraries and testing frameworks
- Drive complex stimulus patterns and monitor design behavior across multiple simulation runs
- Combine Python data processing with HDL simulation for algorithm validation in hardware
Worth the install?
AI-flagged interpretation of the facts on this page. Verify before relying on it.
Yes, if you are developing or verifying VHDL or Verilog designs and want to write testbenches in Python.
The framework is actively maintained, supports current Python versions, has no known vulnerabilities, and carries a permissive license. Install friction is moderate due to compiled wheels, but the broad platform support (macOS, Linux, Windows; x86_64, ARM, i686) mitigates this. Verify that your target HDL simulator is compatible before committing.
Install
cocotb on PyPI
Before you install
Medium install friction due to compiled wheel distribution across multiple Python versions and architectures. The project is actively maintained with recent commits and a stable release cadence, suggesting reliable ongoing support.
Requires a compatible HDL simulator (e.g., Icarus Verilog, GHDL, or commercial simulators) and appropriate environment setup to run testbenches against actual designs.
License in practice
BSD-3-Clause is a permissive license allowing commercial use, modification, and distribution with minimal restrictions—suitable for most projects.
Quickstart
pip install cocotb
import cocotb
from cocotb.triggers import Timer
@cocotb.test()
async def simple_test(dut):
await Timer(1, units='ns')
Verify before relying
- Which specific HDL simulators are officially supported or tested with version 2.0.1
- Whether the single runtime dependency find_libpython is sufficient or if system libraries are also required
- Performance characteristics or scalability limits for large testbenches
Package facts
| License | BSD-3-Clause permissive |
| Python support | Supports the current Python release >=3.6.2 |
| Install friction | Medium. Platform-specific wheel |
| Runtime dependencies | 1 packagefind_libpython |
| Maintenance | Actively maintained 272 days since the last release |
| Last repo commit | |
| First released | |
| Downloads | 589,198 / month, #5,863 on PyPI 30-day window, as of 2026-08-14 |
| Known vulnerabilities | None known OSV.dev, checked 2026-08-14 |
| Classifiers | Framework :: cocotbProgramming Language :: Python :: 3Programming Language :: Python :: 3.10Programming Language :: Python :: 3.11Programming Language :: Python :: 3.12Programming Language :: Python :: 3.13Programming Language :: Python :: 3.6Programming Language :: Python :: 3.7Programming Language :: Python :: 3.8Programming Language :: Python :: 3.9Topic :: Scientific/Engineering :: Electronic Design Automation (EDA) |
Evidence: cocotb-2.0.1-cp310-cp310-macosx_10_9_x86_64.whl; cocotb-2.0.1-cp310-cp310-macosx_11_0_arm64.whl; cocotb-2.0.1-cp310-cp310-manylinux_2_17_x86_64.manylinux2014_x86_64.whl; cocotb-2.0.1-cp310-cp310-manylinux_2_5_i686.manylinux1_i686.manylinux_2_17_i686.manylinux2014_i686.whl; cocotb-2.0.1-cp310-cp310-win32.whl; cocotb-2.0.1-cp310-cp310-win_amd64.whl; cocotb-2.0.1-cp311-cp311-macosx_10_9_x86_64.whl; cocotb-2.0.1-cp311-cp311-macosx_11_0_arm64.whl; cocotb-2.0.1-cp311-cp311-manylinux_2_17_x86_64.manylinux2014_x86_64.whl; cocotb-2.0.1-cp311-cp311-manylinux_2_5_i686.manylinux1_i686.manylinux_2_17_i686.manylinux2014_i686.whl; cocotb-2.0.1-cp311-cp311-win32.whl; cocotb-2.0.1-cp311-cp311-win_amd64.whl; cocotb-2.0.1-cp312-cp312-macosx_10_9_x86_64.whl; cocotb-2.0.1-cp312-cp312-macosx_11_0_arm64.whl; cocotb-2.0.1-cp312-cp312-manylinux_2_17_x86_64.manylinux2014_x86_64.whl; cocotb-2.0.1-cp312-cp312-manylinux_2_5_i686.manylinux1_i686.manylinux_2_17_i686.manylinux2014_i686.whl; cocotb-2.0.1-cp312-cp312-win32.whl; cocotb-2.0.1-cp312-cp312-win_amd64.whl; cocotb-2.0.1-cp313-cp313-macosx_10_13_x86_64.whl; cocotb-2.0.1-cp313-cp313-macosx_11_0_arm64.whl
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