---
id: flydsl
version: "0.3.1"
license: Apache-2.0
license_treatment: permissive
maintenance: active
---

# flydsl — FlyDSL - ROCm Domain Specific Language for layout algebra (Python + embedded MLIR runtime)

License: permissive · Maintenance: active · Downloads: 107.2K/mo

## What it is and what it does

FlyDSL is a Python domain-specific language for writing GPU kernels that run on ROCm hardware. It sits atop an embedded MLIR compiler stack (the Fly dialect) and lets you express kernel structure, data layouts, tiling strategies, and memory movement at a high level in Python, then compile them down to GPU machine code. The package bundles MLIR Python bindings so you don't need a separate MLIR installation.

The core abstraction is a layout system—Shape, Stride, and Layout objects that map logical coordinates to physical memory indices. You compose these layouts using algebra operations (composition, product, partition) to express complex data access patterns like swizzling, tiling, and vectorization. You decorate Python functions with `@flyc.kernel` or `@flyc.jit`, write kernel logic using FlyDSL's expression API (arithmetic, vector, GPU, ROCDL, buffer, math, and memory operations), and the JIT compiler handles lowering to GPU code. Pre-built kernels for GEMM, MoE, Softmax, and Norm are included.

Use it for:

- Author custom GPU kernels with explicit tiling and memory layout control without writing CUDA or HIP directly.
- Prototype and tune high-performance matrix multiplication and tensor operations on ROCm GPUs.
- Express complex data movement and swizzling patterns using layout algebra instead of manual indexing.
- Build production GPU kernels (GEMM, MoE, normalization) with the included pre-built kernel library.
- Benchmark and profile kernel performance using the built-in autotune and benchmarking infrastructure.

## Worth the install?

AI-flagged interpretation of the facts above — verify before relying.

FlyDSL is a Python DSL and embedded MLIR compiler for authoring high-performance GPU kernels with explicit data layouts, tiling, and partitioning on ROCm hardware.

Yes, if you are developing GPU kernels for ROCm hardware and want to express layouts and tiling at a high level. The package is actively maintained, has no known vulnerabilities, and bundles MLIR so setup is simpler than standalone MLIR. Install friction is medium due to ROCm dependency and optional source builds, but pre-built wheels for Python 3.10–3.14 are available. Not suitable if you need CUDA, OpenCL, or non-ROCm GPU support.

## Install

pip install flydsl
uv add flydsl
poetry add flydsl

## Installing flydsl

Before you install: Medium install friction: wheels are available for Python 3.10–3.14 on Linux x86_64, but the package bundles MLIR bindings and requires ROCm for GPU execution and testing. Source builds demand LLVM/MLIR compilation (30+ minutes) and C++17 tooling.

License in practice: Apache-2.0 permissive license allows commercial and proprietary use with minimal restrictions; attribution required.

Quickstart:

pip install flydsl

import flydsl
print('FlyDSL installed')

ROCm is required for GPU execution, tests, and benchmarks; Python 3.8+ required; source builds need cmake >=3.20 and C++17 compiler.

Verify before relying:

- Whether the embedded MLIR runtime is fully functional without a separate MLIR Python wheel installation in all environments.
- Performance characteristics and optimization potential compared to other GPU kernel DSLs or hand-written kernels.
- Maturity and stability of the layout algebra system and compiler passes in production use.

## Package facts

- License: Apache-2.0 (permissive)
- Python support: supports_current
- Install friction: medium
- Maintenance: active
- Downloads: 107.2K/month (top 15,000 on PyPI)
- Known vulnerabilities: none known

## Tags

gpu kernel dsl python, layout algebra compiler, rocm kernel authoring, mlir gpu kernels, tiled gpu programming, high-performance gpu dsl, layout-aware kernel generation, gpu-kernels, mlir-compiler, rocm

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