{"categories":[{"label":"Linguistic","url":"https://skillfed.io/packages/category/text-processing-linguistic"},{"label":"Compilers","url":"https://skillfed.io/packages/category/software-development-compilers"}],"enrichment":{"capability":"Provides a SystemVerilog grammar parser for tree-sitter, enabling incremental parsing and syntax tree analysis of Verilog hardware description language code.","skillfed_tags":["verilog","hdl","parsing"],"use_cases":["Build static analysis tools or linters that understand Verilog syntax and structure.","Generate code from Verilog templates or perform automated refactoring on hardware designs.","Implement IDE features like syntax highlighting or symbol navigation for Verilog.","Parse and analyze Verilog test suites or design specifications programmatically.","Integrate Verilog parsing into hardware verification or simulation workflows."],"what_it_does":"tree-sitter-verilog is a language grammar binding that integrates SystemVerilog parsing into the tree-sitter incremental parsing framework. It allows developers to parse Verilog and SystemVerilog code into abstract syntax trees, enabling static analysis, code generation, linting, and other language-aware tooling for hardware description languages.\n\nThe package ships as precompiled binaries for major platforms (macOS, Linux, Windows; x86_64 and ARM64 architectures), reducing installation friction. It has no runtime dependencies and requires Python 3.9 or later. The project is maintained by the tree-sitter community but is currently dormant, with the last commit in November 2024.","worth_installing":"Yes, if you need to parse SystemVerilog code and are comfortable with a dormant but stable package. The permissive MIT license, zero runtime dependencies, and broad platform support make it low-risk. Install friction is medium due to compiled binaries, but prebuilt wheels for common platforms mitigate this. No known security vulnerabilities. Suitable for hardware design tooling, static analysis, and code generation workflows."},"id":"tree-sitter-verilog","links":{"html":"https://skillfed.io/packages/tree-sitter-verilog","md":"https://skillfed.io/packages/tree-sitter-verilog.md","pypi":"https://pypi.org/project/tree-sitter-verilog/"},"maintenance":{"status":"dormant"},"meta":{"latest_release":"2024-11-10","license_spdx":null,"license_treatment":"permissive","name":"tree-sitter-verilog","python_support":"supports_current","summary":"Verilog grammar for tree-sitter"},"popularity":{"monthly_downloads":1512247,"position":3825,"tier":"top_5000"},"security":{"n_vulnerabilities":0},"version":"1.0.3"}