{"categories":[{"label":"Python Modules","url":"https://skillfed.io/packages/category/software-development-libraries-python-modules/11"},{"label":"Compilers","url":"https://skillfed.io/packages/category/software-development-compilers"},{"label":"Electronic Design Automation (EDA)","url":"https://skillfed.io/packages/category/scientific-engineering-electronic-design-automation-eda"}],"enrichment":{"capability":"pyslang provides Python bindings to parse, analyze, and elaborate SystemVerilog code, exposing the underlying slang compiler's syntax tree and evaluation capabilities for programmatic inspection and manipulation.","skillfed_tags":["hdl-design","compiler-frontend","eda"],"use_cases":["Extract and inspect module hierarchies, port lists, and signal declarations from existing SystemVerilog designs.","Build custom linting or code-quality tools that need to understand SystemVerilog syntax and semantics.","Generate SystemVerilog code or documentation by traversing and analyzing the parsed syntax tree.","Evaluate SystemVerilog expressions and constraints in a scripting context without a full simulator.","Integrate SystemVerilog parsing into editor plugins or language servers for real-time syntax checking."],"what_it_does":"pyslang is a Python interface to the slang SystemVerilog compiler, a high-performance front end for hardware design language processing. It allows you to load and inspect the syntax tree of SystemVerilog files, evaluate expressions in a scripting context, and access detailed information about modules, ports, declarations, and types. The underlying slang library handles lexing, parsing, type checking, and elaboration of SystemVerilog code with emphasis on compliance and robustness.\n\nYou use pyslang when you need to programmatically analyze or transform SystemVerilog designs\u2014for example, extracting module hierarchies, validating code structure, generating reports, or building custom linting and refactoring tools. It has no runtime dependencies and is distributed as precompiled wheels for common platforms, making installation straightforward on supported Python versions.","worth_installing":"Yes, if you work with SystemVerilog and need programmatic access to parsing and analysis. The package is actively maintained, has no known vulnerabilities, carries a permissive MIT license, and offers precompiled wheels for modern Python on major platforms. Medium install friction is acceptable given the complexity of compiling a C++ SystemVerilog parser. Not necessary if you only need command-line compilation or linting."},"id":"pyslang","links":{"html":"https://skillfed.io/packages/pyslang","md":"https://skillfed.io/packages/pyslang.md","pypi":"https://pypi.org/project/pyslang/"},"maintenance":{"status":"active"},"meta":{"latest_release":"2026-05-15","license_spdx":null,"license_treatment":"permissive","name":"pyslang","python_support":"unspecified","summary":"Python bindings for slang, a library for compiling SystemVerilog"},"popularity":{"monthly_downloads":455517,"position":6556,"tier":"top_15000"},"security":{"n_vulnerabilities":0},"version":"11.0.0"}