{"categories":[{"label":"Build Tools","url":"https://skillfed.io/packages/category/software-development-build-tools/5"}],"enrichment":{"capability":"DVSim is a Python-based build and run system that orchestrates EDA tool flows for ASIC design verification, including simulations, formal verification, lint, synthesis, and coverage analysis.","skillfed_tags":["hardware-design","eda-tools","asic-verification"],"use_cases":["Automate and standardize simulation runs across multiple testbenches in a chip design project","Run formal verification and connectivity checks as part of a continuous integration pipeline","Execute lint and synthesis flows with consistent tool configurations and reporting","Generate coverage reports and unreachability analysis for design verification sign-off","Orchestrate multi-step EDA workflows (e.g., lint \u2192 synthesis \u2192 formal) from a single command"],"what_it_does":"DVSim is a standardized command-line interface and orchestration layer for running EDA (Electronic Design Automation) tool flows in ASIC and chip design projects. It wraps multiple verification and synthesis steps\u2014simulations, formal property verification, lint checking, synthesis, CDC (Clock Domain Crossing), and RDC (Reset Domain Crossing) analysis\u2014into a single, repeatable workflow. Originally developed for the OpenTitan open-source Root of Trust project, it generalizes to any ASIC project.\n\nThe package depends on common Python tools for visualization (matplotlib, plotly), configuration (pyyaml, hjson, toml, pydantic), templating (jinja2), and CLI interaction (click, enlighten). It generates reports and badges (anybadge) and integrates with git workflows. Installation is straightforward via pip into a virtual environment, though practical use requires access to EDA tools and design files in a hardware development environment.","worth_installing":"Yes, if you are working on ASIC or chip design verification. DVSim is actively maintained, has no known vulnerabilities, and low install friction. It solves a real problem in hardware design by standardizing EDA tool orchestration. Install it if your project uses multiple EDA flows; it is not useful for general software development or outside hardware design contexts."},"id":"dvsim","links":{"html":"https://skillfed.io/packages/dvsim","md":"https://skillfed.io/packages/dvsim.md","pypi":"https://pypi.org/project/dvsim/"},"maintenance":{"status":"active"},"meta":{"latest_release":"2026-08-07","license_spdx":"Apache-2.0","license_treatment":"permissive","name":"dvsim","python_support":"supports_current","summary":"DV system"},"popularity":{"monthly_downloads":81954,"position":14190,"tier":"top_15000"},"security":{"n_vulnerabilities":0},"version":"1.50.1"}